Hyderabad
Founded by highly respected Silicon Valley veterans – with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore
Our pay comprehensively beats “ALL” Semiconductor product players in the Indian market
Senior Verification Engineer – Cache, Memory & NVMe Subsystems
Experience: 10+ Years
Location: Hyderabad
Role Overview
We are hiring a Senior Verification Engineer with strong experience in cache controller, memory subsystem, and SSD/NVMe protocol verification. The role involves building UVM-based environments, driving coherency and storage datapath validation, and ensuring performance and protocol compliance across CPU-to-memory-to-storage paths.
Key Responsibilities
- Develop and maintain SystemVerilog/UVM testbenches for cache controllers, memory controllers, and NVMe/PCIe-based storage subsystems
- Verify cache coherency protocols and memory transaction ordering
- Validate NVMe command flows, queue management, DMA transactions, and PCIe/CXL transport behaviour
- Create checkers/monitors for read/write/flush/invalidate/eviction sequences
- Debug coherency issues, data corruption, timing/order violations, and protocol mismatches
- Drive coverage closure and signoff across functional, assertion, and performance scenarios
Minimum Qualifications
- 10+ years of ASIC/SoC/IP Verification experience
- Strong command of SystemVerilog, UVM, and coverage-driven verification methodologies
- Hands-on experience with cache controller or memory subsystem verification
- Familiarity with NVMe / PCIe / CXL.io / CXL.mem protocol verification
- Knowledge of AMBA protocols (AXI / ACE / CHI)
Preferred Qualifications
- Experience analyzing latency/bandwidth/throughput for cache or storage subsystems
- Exposure to flash/NAND memory models, SSD datapath flows
- Experience with FPGA/emulation or post-silicon validation (bonus)
Contact: Uday
Mulya Technologies
Email:
…