Verification & Validation Engineer, Hardware Design

Company: AUMOVIO
Apply for the Verification & Validation Engineer, Hardware Design
Location: Bangalore
Job Description:

Digital Verification Engineer

Experience: 6+ years

Key Responsibilities

  • Develop and execute verification plans based on design and architecture specifications.
  • Build SystemVerilog/UVM-based testbenches and reusable verification components.
  • Create directed and constrained-random test cases for functional and corner-case verification.
  • Debug simulation failures using industry-standard tools and collaborate with RTL designers to resolve issues.
  • Define, measure, and close functional and code coverage gaps.
  • Implement System Verilog Assertions (SVA) for protocol and behavioral checking.
  • Run and monitor regression suites; triage failing tests and track issues.
  • Participate in specification reviews, design reviews, and verification progress meetings.
  • Maintain clear documentation for testbench architecture, test scenarios, and verification results.
  • Automate verification workflows using scripting languages such as Python, Perl, Shell, or Tcl.

Required Skills & Qualifications

  • Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field.
  • Strong understanding of digital logic, RTL design, FSMs, pipelines, and bus architectures.
  • Hands-on experience with SystemVerilog and UVM methodology.
  • 6+ years of experience in digital verification with a focus on mixed-signal circuits and systems
  • Proficiency with verification simulators (e.G., VCS, Questa, Xcelium).
  • Experience using debug tools such as Verdi, SimVision, or DVE.
  • Familiarity with version control and regression systems (Git, Jenkins, etc.).
  • Solid understanding of coverage-driven verification techniques.
  • Experience verifying standard interfaces (AXI, AHB, DDR, PCIe, etc.).
  • Strong analytical, debugging, and problem-solving skills.

Preferred Qualifications

  • Knowledge of formal verification methodologies and tools (e.G., JasperGold, VC Formal).
  • Internal
  • Strong scripting experience for automation (Python, Perl, Shell, Tcl).
  • Experience with SoC-level verification, emulation, or FPGA prototyping.
  • Exposure to low-power/UPF verification flows.

Personal Attributes

  • Strong communication and teamwork abilities.
  • Self-driven, with the ability to work independently in a fast-paced environment.
  • Detail-oriented and committed to delivering high-quality results.

Posted: March 21st, 2026